1. Field of the Invention
The present invention relates to the technical field of liquid crystal displays (LCDs) and, more particularly, to a method and system for processing image data in LCD by integrating de-interlace and overdrive operations.
2. Description of Related Art
Upon the rapid advance of electronic technologies, CRTs are increasingly replaced by LCDs. FIG. 1 is a schematic diagram of a partial circuit of an LCD, which includes a de-interlace device 110, a frame scaling controller 120, an overdrive device 130 and dynamic random access memories (DRAMs) 140, 150. As shown in FIG. 1, for the limited bandwidth, the video datastream uses alternate odd and even fields in transmission. The de-interlace device 110 directly merges two adjacent odd and even fields into a progressive scan frame. The frame scaling controller 120 performs a vertical and horizontal scaling on a frame to thereby produce a display frame which meets with the resolution of an LCD screen.
FIG. 2 is schematic graph of an operation of the overdrive device 130. The overdrive device 130 uses the difference between gray levels of corresponding pixels in two successive display frames so as to adjust the target gray levels to thereby improve the slow response. As shown in FIG. 2, VN(I, J) indicates a driving voltage of a pixel (I, J) of a first display frame, and VN+1(I, J) indicates a driving voltage of a pixel (I, J) of a second display frame. When the system does not use the overdrive device, the driving voltage VN+1(I, J) for the pixel (I, J) of the second display frame is shown in curve A. When the overdrive device 130 is adopted, the driving voltage VN+1(I, J) for the pixel (I, J) of the second display frame is shown in curve B, thereby reducing the response time of the liquid crystal display screen.
The first and second display frames are stored in the memory 150 for the overdrive device 130 to compute the gray levels of corresponding pixels in the two successive display frames. However, the required memory size is increased more and more with the increasingly high resolution of the LCD screen. Accordingly, the memory bandwidth for the overdrive device 130 to read the two successive frames is required more and more.
To overcome the aforementioned problem, the prior art reduces the number of bits for representing a gray level, such as from 8-bit to 5-bit, for storing in the memory to thereby reduce the required DRAM 150, but the entire system still requires two DRAMs 140, 150. In such case, it is hard to integrate the de-interlace device 110, the frame scaling controller 120 and the overdrive device 130 into one chip.
Therefore, it is desirable to provide an improved LCD circuit to mitigate and/or obviate the aforementioned problems.